FETCH
DECODE
EXECUTE
STORE
RAM (Main Memory)
CENTRAL PROCESSING UNIT Core 1
PC
00
Prog Counter
MAR
00
Mem Address
MDR
00
Mem Data
Instruction (IR)
---
Accumulator (AC)
0
Process Status
IDLE
0
ALU
+
0
=
0
STEP
OPERATION
Input Operation
A+B
A-B
C+D
INTERNAL LOGIC
System standby. Load a command to begin instruction fetch.
Advanced: Pipelining
EXPERIMENTAL
Overlap instructions to process 4 instructions simultaneously. Like a car assembly line!